1. Field of the Invention
The present invention relates to an integrated semiconductor device, and in particular, to a semiconductor device with fuses which are used for a redundancy circuit.
2. Description of the Related Art
In recent years, high integration of integrated semiconductor circuits has advanced, and with respect to DRAMs in particular, high-integration of the gigabit level is required in the field of art. In semiconductor memories such as DRAMs, a redundancy technique has been used, and a fuse cutting method by laser radiation has been used to replace a defective cell with a space cell by the redundancy technique. As high integration of semiconductor devices has progressed, large scaling of the number of fuses has progressed. A technique for reducing the surface area occupied by the fuses has become necessary, since the large scaling of the number of fuses results in an increase of the surface area on a semiconductor chip occupied by the fuses, accordingly.
A conventional fuse arrangement form is shown in FIG. 15 in a cross sectional view. An interlayer insulation film 51 is formed on a semiconductor substrate 50, and a plurality of fuses 52 (in FIG. 15, three fuses are shown) are formed in a surface-extension direction of the substrate 50 in an upper layer region of the interlayer insulation film 51. However, as shown in FIG. 15, no wiring, elements, etc., are formed in a layer region of the interlayer insulation film 51, which is lower than the upper layer region in which the fuses 52 are formed. If wiring, elements, etc., can be formed in the lower layer region of the interlayer insulation film 51, an increase in the occupied surface area can be suppressed by an amount corresponding to the wiring, elements, etc., and therefore, the increase of the occupied surface area due to the large scaling of the number of fuses can be absorbed. However, in the conventional fuse arrangement form, wiring, elements, etc., cannot be formed in the lower layer region of the interlayer insulation film 51. The reasons for this are given hereinafter.
A laser used for cutting a redundancy fuse is an infrared laser having a wavelength of 1321 nm or 1047 nm, and hence the laser passes through the interlayer insulation film, and concretely, through the interlayer insulation film at the periphery of a fuse. The light absorption coefficient of silicon, which is used for a semiconductor substrate as the backside layer of the interlayer insulation film, is extremely small compared with the light absorption coefficient of the fuse. Hence, at the time of cutting the fuse by laser beam, even if the laser beam passes through the interlayer insulation film and reaches the silicon substrate, the silicon is not damaged.
However, if a material layer such as metal wiring, a polysilicon layer or the like having an absorption coefficient of the same level as the fuse is provided in the lower layer region of the interlayer insulation film 51, which is lower than the upper layer region in which the fuses are formed, the laser beam which has passed through the interlayer insulation film is radiated onto the material layer in the lower layer region, and the material layer is damaged. Namely, the fuse cannot be cut without the material layer in the lower layer region being damaged.
As a technique of attempting to form a metal wire or a polysilicon layer in the lower layer region of the insulation film, as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2000-243845, there is a technique of forming a laser absorbing layer on the entire surface of an insulation film in which the fuses are formed. However, with this technique, it is necessary to cut the laser absorbing layer and the fuse simultaneously by laser radiation, and thus, it is also necessary to radiate a high energy laser beam. Since a high energy laser radiation increases the damage to the region adjacent to the fuse to be cut, the fuse pitch must be made large. Thus, the surface area occupied by the fuses increases.
Further, as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 11-340434, a method has been proposed in which, by forming a laser absorbing layer in the lower layer region of the insulation film in which the fuses are formed, passage of the laser beam through the laser absorbing layer is cut off by the laser absorption by the laser absorbing layer, and wirings or elements provided lower than the laser absorbing layer are protected from being damaged. However, with this technique, there is the need for selectability such that only the fuses are cut and radiation damage is not caused to the laser absorbing film. However, even when the laser absorbing film is a refractory metal film such as W, Ti, Ta or the like, the energy margin for cutting only the fuses without causing damage to the laser absorbing film is small. As a result, a problem arises in that the yield is not improved.
Further, Jpn. Pat. Appln. KOKAI Publication No. 2000-114382 discloses a technique of forming a dummy pattern to absorb damage at the time of fuse cutting, in a layer region of the insulation film, which is lower than a layer region in which fuses are formed, and providing a wiring layer in a further lower layer region of the insulation film. However, in the case of this technique, since a dummy pattern whose width is greater than that of the fuse is used, it is an impediment to large the interval between the fuses. Moreover, the dummy pattern itself cannot be used as a signal line or a power source line. Thus, there is the need to provide signal lines or power source lines in a further lower layer region of the insulation film, which leads to the manufacturing process becoming complex.
Further, currently, as control circuits are becoming smaller-sized, demands have arisen to small the pitch between fuses. This situation will be described hereinafter. FIG. 16 illustrates a conventional arrangement pattern of a memory cell region 53, a control circuit 54, and a fuse region. One ends of respective fuses 52 are connected via connecting wirings 56 to a fuse connecting portion 55 of the control circuit 54. Each fuse 52 comprises a fusing portion 57, and a control side connecting end 58 and a common side connecting end 59 connected to the ends of the fusing portion 57. A common signal line 60 is connected to the common side connecting ends 59. At the time of operation of the semiconductor device, common electric potential is applied to the common signal line 60, and the respective common side connecting ends 59 of the plural fuses have the same electric potential.
Signal lines 61, such as power source lines, signal lines or the like one ends of which are connected to the memory cell region 53 and the control circuit 54, are formed to have a pattern rounding the region at which the fuses are formed. The other ends of the signal lines 61 are connected to another circuit region (not shown).
As shown in FIG. 15, the fuses arranged in a row in the surface-extension direction of the semiconductor substrate 50 are, as shown in FIG. 16, connected to the control circuit 54. With the advance of miniaturization of semiconductor devices, miniaturization of these control circuits 54 has progressed, and the demand for smaller pitches between fuses in accordance with the size reduction of control circuits has arisen.
However, the limit of small sizing the pitch between fuses is restricted by the beam diameter of the radiated laser. Thus, the pitch between fuses cannot be made more small coincident with the small-sizing of the control circuit 54.
Further, conventionally, since wirings cannot be formed at the lower layer region of the insulation film, thus, wirings such as power source lines, signal lines and the like are provided an area other than the fuse forming area of the semiconductor substrate. That is, it is necessary to define the wiring forming area independently on the semiconductor substrate, and as a result, the chip size increases and the manufacturing costs increase. Since wirings such as power source lines, signal lines and the like are provided in a manner so as to be avoided from being formed in the regions where fuses are formed, the wiring lengths become long. Thus, problems arise in that voltage drops and signal transfer delays arise, the power consumption increases, and the speed of operation becomes lower.
Moreover, accompanying the higher integration of control circuits, the connecting regions of control circuits with the fuse regions have become smaller, and a problem arises in that the number of fuses which can be connected to the control circuit becomes smaller. On the other hand, there are limits to make the radiation beam diameter of the laser smaller, due to constraints of laser radiating devices. Thus, there is the need to keep the fuse width and the fuse pitch within the constraints of the laser radiation diameter. Therefore, there are limits to decreasing the fuse width and the fuse pitch. As a result, there are limits to increasing the number of fuses to be connected to a smaller-sized control circuit.